Host(主機(jī))
A general-purpose computer that communicates with the target via a serial port or network connection. This term is usually used to distinguish the computer on which the debugger is running from the embedded system that is being developed.
一臺(tái)通用計(jì)算機(jī),它通過(guò)串口或網(wǎng)絡(luò)連接與目標(biāo)機(jī)通訊。這處名詞一般用來(lái)區(qū)別調(diào)試程序運(yùn)行的計(jì)算機(jī)和被開(kāi)發(fā)的嵌入式系統(tǒng)。
I
ICE
In-Circuit Emulator. See emulator.
在線仿真器。查閱仿真器。
I/O(輸入/輸出)
Input/Output. The interface between a processor and the world around it. The simplest examples are switches (inputs) and LEDs (outputs).
輸入/輸出。處理器與外界的交互界面。最簡(jiǎn)單的例子是開(kāi)關(guān)(輸入)和發(fā)光二級(jí)管(輸出)。
I/O device(IO設(shè)備)
A piece of hardware that interfaces between the processor and the outside world. Common examples are switches and LEDs, serial ports, and network controllers.
一種介于處理器和外界之間的硬件設(shè)備。一般的實(shí)例是開(kāi)關(guān)、LED、串口和網(wǎng)絡(luò)控制器。
I/O map(I/O映射)
A table or diagram containing the name and address range of each peripheral addressable by the processor within the I/O space. I/O maps are a helpful aid in getting to know the target.
一張包含每個(gè)外設(shè)的名字和地址的表格或圖表,可由處理器在I/O空間中設(shè)定地址。I/O映射對(duì)得知目標(biāo)機(jī)情況非常有利。
I/O space(I/O空間)
A special memory region provided by some processors and generally reserved for the attachment of I/O devices. Memory locations and registers within an I/O space can be accessed only via special instructions. For example, processors in the 80x86 family have special I/O space instructions called in and out. Contrast with memory space.
一個(gè)由處理器提供的特殊內(nèi)存區(qū)域,一般為為I/O設(shè)備的附件保留。在I/O空間的內(nèi)存位置和寄存器只能通過(guò)特殊的指定進(jìn)行訪問(wèn)。例如:80X86家族的處理器有叫做in / out的特殊的I/O空間指令。相對(duì)內(nèi)存空間而言。
ISR(中斷服務(wù)程序)
See interrupt service routine.
instruction pointer(指令指針)
A register in the processor that contains the address of the next instruction to be executed. Also known as a program counter.
包含下一條要執(zhí)行指令地址的處理器中的寄存器。也叫程序計(jì)數(shù)器。
Interrupt(中斷)
An asynchronous electrical signal from a peripheral to the processor. When the peripheral asserts this signal, we say that an interrupt occurs. When an interrupt occurs, the current state of the processor is saved and an interrupt service routine is executed. When the interrupt service routine exits, control of the processor is returned to whatever part of the software was previously running.
一個(gè)從外設(shè)到處理器的異步電信號(hào)。當(dāng)外設(shè)發(fā)出這個(gè)信號(hào),我們說(shuō)一個(gè)中斷發(fā)生。當(dāng)一個(gè)中斷發(fā)生,當(dāng)前的處理器狀態(tài)被保存并且中斷服務(wù)程序開(kāi)始運(yùn)行。當(dāng)中斷服務(wù)程序退出,對(duì)處理器的控制權(quán)轉(zhuǎn)到先前運(yùn)行的那個(gè)軟件上。
interrupt latency(中斷延遲)
The amount of time between the assertion of an interrupt and the start of the associated interrupt service routine.
在中斷發(fā)生和相關(guān)的中斷服務(wù)程序運(yùn)行之間的時(shí)間長(zhǎng)短。
interrupt service routine(中斷服務(wù)程序)
A piece of software executed in response to a particular interrupt.
響應(yīng)特定中斷而運(yùn)行的一小段軟件。
interrupt type(中斷類型)
A unique number associated with each interrupt.
和每一個(gè)中斷相關(guān)聯(lián)的唯一數(shù)字。
interrupt vector (中斷向量)
The address of an interrupt service routine.
中斷服務(wù)程序所在的地址。
interrupt vector table(中斷向量表)
A table containing interrupt vectors and indexed by interrupt type. This table contains the processor"s mapping between interrupts and interrupt service routines and must be initialized by the programmer.<<容~源~電~子~網(wǎng)~版權(quán)聲明:本站內(nèi)容部分來(lái)源于網(wǎng)絡(luò),如侵犯到你的權(quán)利請(qǐng)及時(shí)與我們聯(lián)系更正,聯(lián)系QQ:316520686。
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